(Need agreements for process development and results)
Reference
S.Lee†, S.K.Lee†, et al., “Graphene transfer in vacuum yielding a high quality graphene”, Carbon, 93, 2015, p.286-294.
S.K.Lee, Y.J.Kim, et al., “Advantages of a buried-gate structure for graphene field-effect transistor”, Semiconductor Science and Technology, Accepted, 2019.
S.K.Lee, Y.J.Kim and B.H.Lee*, "Study on future electronic device using graphene", Vacuum Magazine, 2016.
T.J.Yoo, Y.J.Kim, S.K.Lee, et al., Zero-bias operation of CVD graphene photodetector with asymmetric metal contacts", on-line published, ACS Photonics, 2018.
H.J.Hwang, S.K.Lee, et al., “Graphene barristor using nitrogen profile controlled ZnO Schottky contacts", Nanoscale, 9, p.2442, 2017.
Y.J.Kim, S.K.Lee, et al., "Demonstration of Complimentary Ternary Graphene Field Effect Transistors ", Scientific Reports, 6, p.39393, 2016.
[ Buried-gate GFET ]
[ Top-gate GFET ]
[ Buried-gate GFET ]
[ Top-gate GFET ]
Example : Buried gate device fabrication processes
Example : Buried gate device fabrication processes
Based on 4-inch wafer product
